The present invention generally relates to bond pad structures and methods of bonding semiconductor devices to substrates and more particularly to a copper bonding compatible bond pad structure and a method of bonding copper bonding wires to a semiconductor device without damaging device package layers and underlying device structures.
Conventional bonding methods utilize either Al or Au bonding wires to connect the semiconductor device to a substrate such as a leadframe. Al suffers the disadvantage of having high resistance while Au is increasingly expensive.
Cu bonding wires have been considered an inexpensive alternative to Al and Au bonding wires. Cu is inexpensive, readily available, and has low resistance. As such, fewer Cu bonding wires are generally required. However, Cu bonding wires are harder than either Al or Au bonding wires and their use presents challenges not satisfactorily overcome by the prior art.
As Cu and Cu alloys are harder than conventional bonding wires, bonding using Cu and Cu alloy bonding wires may result in damage to the semiconductor device or to package layers forming a device bond pad. With reference to FIG. 1, an exemplary prior art semiconductor device 100 includes a substrate 110 having a semiconductor device (not shown) formed therein. Substrate 110 may be formed of Si and the semiconductor device may include a power MOSFET. A TiNi barrier metal layer 120 is disposed under an Al, AlCu or AlSiCu electrode metal layer 130. A bond pad 140 may be formed by patterning a passivation layer 150 formed of oxynitride or silicon rich oxynitride. Bond pad 140 may include a MOSFET source bond pad.
A Cu bond wire 200 is shown in FIG. 2 and FIG. 3 bonded to the bond pad 140. As shown in FIG. 3, the Cu bond wire 200 has penetrated the electrode metal layer 130 and partially penetrated the barrier metal layer 120. Damage to the barrier metal layer 120 can result in junction leakage and/or device failure over time. In an extreme case (not shown), the Cu bond wire 200 may completely penetrate the barrier metal layer 120 and damage the semiconductor device.
To address this problem, prior art techniques use a very thick electrode metal layer 130. Typical thicknesses are much greater than 3 microns and typically 6 microns. This technique disadvantageously increases material and manufacturing costs making the patterning of fine lines in the device interconnects very difficult.
There is therefore a need in the art for a copper bonding compatible bond pad structure and associated method that does not damage the barrier metal layer or underlying device structures. There is a further need in the art for a bond pad structure and associated method that achieves low contact resistance. There is also a need in the art for a bond pad structure and associated method that can be achieved at no additional processing cost.